International Journal of Engineering
Trends and Technology

Research Article | Open Access | Download PDF
Volume 74 | Issue 8 | Year 2026 | Article Id. IJETT-V74I8P105 | DOI : https://doi.org/10.14445/22315381/IJETT-V74I8P105

Simplified Space Vector PWM for a Four-Level NPC Inverter Using a Three-Level SVM Method-Based Carrier-Overlapped PWM Technique


Ong-ard Tubburee, Kanyarat Ek-iam

Received Revised Accepted Published
04 Feb 2026 19 Jun 2026 24 Jun 2026 29 Aug 2026

Citation :

Ong-ard Tubburee, Kanyarat Ek-iam, "Simplified Space Vector PWM for a Four-Level NPC Inverter Using a Three-Level SVM Method-Based Carrier-Overlapped PWM Technique," International Journal of Engineering Trends and Technology (IJETT), vol. 74, no. 8, pp. 68-79, 2026. Crossref, https://doi.org/10.14445/22315381/IJETT-V74I8P105

Abstract

In this paper, a simplified Space Vector Pulse-Width Modulation (SVPWM) strategy for a Four-Level Neutral-Point-Clamped (4L-NPC) inverter is proposed on the basis of a Three-Level Space Vector Modulation (3L-SVM) scheme with Carrier-Overlapped PWM (COPWM). The proposed strategy uses only one continuous modulating signal for every phase leg, along with three appropriately positioned triangular carrier waveforms. This method does not require the dwell-time calculation and multi-reference signal generation, unlike classical digital virtual SVPWM and VR-ZSI PWM schemes. The proposed approach restructures 3L-SVM principles into a carrier-based structure and therefore achieves SVM-like voltage utilization and harmonic performance while corresponding to reduced computational complexity. The simulations were conducted in the MATLAB/Simulink environment to validate the proposed strategy and compare it with the PD-PWM and VR-ZSI PWM schemes. The results demonstrated that the proposed COPWM technique enabled stable operation over a wide Modulation index (mₐ) range. Moreover, within 0.50 ≤ mₐ ≤ 1.00, the proposed strategy achieved improved DC-link voltage utilization, thereby improving an average increment of 8.50% and 19.77% in the fundamental line voltage compared to VR-ZSI PWM and PD PWM methods, respectively. In addition, it also provided the lowest Total Harmonic Distortion (THD), reducing phase voltage THD from 67.14% (PD-PWM) and 62.29% (VR-ZSI PWM) to 61.18%. Furthermore, the proposed scheme achieved balanced DC-link capacitor voltages without additional sensing or control strategies. The results demonstrated that the proposed COPWM is a viable compromise between performance and ease of implementation, and it is suitable for real-time control of 4L-NPC inverters.

Keywords

4L-NPC, SVPWM, Carrier-Overlapped PWM, 3L-SVM, Modulation index.

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